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A Study of Memory-Aware Scheduling in Message Driven Parallel Programs
IEEE International Conference on High Performance Computing (HiPC) 2010
Publication Type: Paper
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This paper presents a simple, but powerful memory-aware scheduling mechanism that adaptively schedules tasks in a message driven parallel program. The scheduler adapts its behavior whenever memory usage exceeds a threshold by scheduling tasks known to reduce memory usage. The usefulness of the scheduler and its low overhead are demonstrated in the context of an LU matrix factorization program. In the LU program, only a single additional line of code is required to make use of the new general-purpose memory-aware scheduling mechanism. Without memory-aware scheduling, the LU program can only run with small problem sizes, but with the new memory-aware scheduling, the program scales to larger problem sizes.
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