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PPL/Charm++ at SC17

Topology Aware Mapping for Performance Optimization of Science Applications
International Association for Computerized Adaptive Testing Conference (IACAT) 2008
Publication Type: Talk
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Summary
The emergence of large machines with 3D mesh/torus interconnects and significant dependence of message latencies on hops (links) traversed by messages have led to the re-emergence of topology aware mapping as a technique for optimizing communication and improving performance. In this talk, I will motivate why it is important to pay attention to topology-aware mapping. I will then discuss the application of this technique to two production codes, NAMD and OpenAtom and performance improvements obtained as a result. I will also mention some other CSE applications which can benefit from mapping and future work on a general automatic framework which can do mapping for applications automatically. This will relieve the application developers of the burden of manually defining a mapping.
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